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pinout (распиновка)

JTAG Header Pinout for FPGA/CPLD Applications (Comcom Electronics Standard)

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Pin Name Direction Description
1 TCK Test Clock
2 GND Ground
3 TDI Test Data Input
4 GND Ground
5 TDO Test Data Output
6 VCC Power Supply
7 TMS Test Mode Select
8 TRS Test Reset

Источник: www.comcom.ru

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