I2C bus [Inter-IC Bus] or [IIC Bus] was originally designed to be a battery control interface. The I2C bus uses a bi-directional Serial Clock Line [SCL] and Serial Data Lines [SDA]. Both lines are pulled high via a resistor [Rp]. Resistor Rs is optional, and used for ESD protection for "Hot-Swap" devices. No other lines are specified. Three speed modes are specified: Standard; 100kbps [Bits per Second], Fast mode; 400kbps, High speed mode 3.4Mbps. The maximum bus capacitance is 400pF, which sets the maximum number of devices on the bus and the maximum line length. The interface uses 8 bit long bytes, MSB [Most Significant Bit] first, with each device having a unique address. Any device may be a Transmitter or Receiver, and a Master or Slave. Data and clock are sent from the Master ~ valid while the clock line is high. The link may have multiple Masters and Slaves on the bus, but only one Master may be active at any one time. Slaves may receive or transmit data to the master. I2C defines the electrical layer and protocol, and was developed by Philips Semiconductors. VDD may be different for each device, but all devices have to relate their output levels to the voltage produced by the pull-up resistors [RP].
Access.Bus is a low speed serial bus aimed at the PC (serial bus) market. Access.Bus
uses the I2C bus as the electrical hardware interface. A four pin modular type
connector and a shielded 4 wire cable is called out in the specification. ACCESS.bus
operates at 100 Kbps with a maximum cable length is 10 meters, however a repeater
may be added to increase the bus length. Access.Bus uses the same signals as
the I2C bus, and adds ground and power. The specification is controlled by the
ACCESS.bus Industry Group (ABIG).
||Send Data, Green
||Serial Clock, White
||Connected only to the host connector shield and host ground
The Access.Bus specification also calls out pull-up and serial resistors located
on the host.