The AGP bus is based on the PCI [Peripheral Component Interface] spec, using the PCI specification as an operational baseline. The AGP specification adds 20 additional signals not included in the PCI bus. The AGP specification defines the Protocol, Electrical and Mechanical aspects of the bus.

The Mechanical definitions include a connector and Add-in card. The Card sizes and 1.5v and 3.3v connectors are also defined with in the spec. There are five connectors defined: AGP 3.3v, AGP 1.5v, AGP Universal, AGP Pro Universal, AGP Pro 3.3v, and AGP Pro 1.5v. PCI and AGP boards are not mechanically interchangeable.

The AGP 1.0 specification defined 1x and 2x speeds with the 3.3v keyed connector.
The AGP 2.0 specification defined 1x, 2x and 4x speeds with the 3.3v, or 1.5v keyed connector or a "Universal" connector which supported both card types.
The AGP Pro specification defined 1x, 2x and 4x speeds with the 3.3v, or 1.5v keyed connector or a "Universal" connector which supported both card types.
The AGP 3.0 specification defined 1x, 2x, 4x and 8x speeds with the 1.5v keyed connector or a 1.5v AGP Pro connector.
Each up-grade is a supper-set of the 1x mode, so 4x will also support 1x. The base clock rate is 66MHz, but to achieve to 2x, 4x, and 8x speeds the clock is doubled each time. AGP uses both edges of the clock to transfer data.

AGP (1x): 66MHz clock, 8 bytes/clock, Bandwidth: 266MB/s [3.3V or 1.5V signal swing]
AGP 2x: 133MHz clock, 8 bytes/clock, Bandwidth: 533MB/s [3.3V or 1.5V signal swing]
AGP 4x: 266MHz clock, 16 bytes/clock, Bandwidth: 1066MB/s [1.5V signal swing]
AGP 8x: 533MHz clock, 32 bytes/clock, Bandwidth: 2.1GB/s [0.8V signal swing]

The AGP data bus may be 8, 16, 24, 32, or 64 bits. Due to timing requirements the maximum bus length is 9". The trace impedance is specified as 65 ohms +/- 15 ohms (no termination resistor is specified). For the 8x speed the bus requires a parallel termination.